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主题最新回顾(发布时间:2009-07-05 08:43:52) |
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-- 作者:McuIsp
-- CortexM3_Bitband_DEF.h #ifndef __CortexM3_Bitband_DEF_H #define BITBAND_SRAM_REF 0x20000000 |
主题最新回顾(发布时间:2009-07-05 08:43:16) |
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-- 作者:McuIsp
-- MyPinOp.C //-- #include "MyPinOp.h" #define STM_GPIO_BASE_ADDRESS ((unsigned long )0x40010800) typedef struct { volatile unsigned long CRL; volatile unsigned long CRH; volatile unsigned long IDR; volatile unsigned long ODR; volatile unsigned long BSRR; volatile unsigned long BRR; volatile unsigned long LCKR; } MyGPIO_TypeDef; //-- __root void SetPinMode(unsigned char Pin,TStmPinMode mode) { MyGPIO_TypeDef *gpio; gpio=(MyGPIO_TypeDef*)(STM_GPIO_BASE_ADDRESS+(Pin/16*0x400l)); unsigned long cr; unsigned long crm=mode&0xf; crm=(crm<<((Pin&0x7)*4)); unsigned long crn=~((0x0fl)<<((Pin&0x7)*4)); if((Pin&0xf)<8) { cr=gpio->CRL; cr&=crn; cr|=crm; gpio->CRL=cr; } else { cr=gpio->CRH; cr&=crn; cr|=crm; gpio->CRH=cr; } } //-- __root unsigned long PinIdr(unsigned char Pin) { MyGPIO_TypeDef *gpio; gpio=(MyGPIO_TypeDef*)(STM_GPIO_BASE_ADDRESS+(Pin/16*0x400l)); return (gpio->IDR&(0x1<<(Pin&0xf))); } //-- __root unsigned long PinOdr(unsigned char Pin) { MyGPIO_TypeDef *gpio; gpio=(MyGPIO_TypeDef*)(STM_GPIO_BASE_ADDRESS+(Pin/16*0x400l)); return (gpio->ODR&(0x1<<(Pin&0xf))); } //-- __root void SetPin(unsigned char Pin) { MyGPIO_TypeDef *gpio; gpio=(MyGPIO_TypeDef*)(STM_GPIO_BASE_ADDRESS+(Pin/16*0x400l)); gpio->BSRR=(0x1<<(Pin&0xf)); } //-- __root void ClrPin(unsigned char Pin) { MyGPIO_TypeDef *gpio; gpio=(MyGPIO_TypeDef*)(STM_GPIO_BASE_ADDRESS+(Pin/16*0x400l)); gpio->BRR=(0x1<<(Pin&0xf)); } //-- __root void SpinPin(unsigned char Pin) { MyGPIO_TypeDef *gpio; gpio=(MyGPIO_TypeDef*)(STM_GPIO_BASE_ADDRESS+(Pin/16*0x400l)); if((gpio->ODR&(0x1<<(Pin&0xf)))==0) { gpio->BSRR=(0x1<<(Pin&0xf)); } else { gpio->BRR=(0x1<<(Pin&0xf)); } } //-- unsigned long LockPin(unsigned char Pin) { MyGPIO_TypeDef *gpio; gpio=(MyGPIO_TypeDef*)(STM_GPIO_BASE_ADDRESS+(Pin/16*0x400l)); if(gpio->LCKR&0x10000)return 0; gpio->LCKR|=(0x1<<(Pin&0xf)); return 1; } //-- unsigned long UnlockPin(unsigned char Pin) { MyGPIO_TypeDef *gpio; gpio=(MyGPIO_TypeDef*)(STM_GPIO_BASE_ADDRESS+(Pin/16*0x400l)); if(gpio->LCKR&0x10000)return 0; gpio->LCKR&=(~(0x1<<(Pin&0xf))); return 1; } //-- unsigned long LockPort(unsigned char Pin) { #ifdef LockPortEn MyGPIO_TypeDef *gpio; gpio=(MyGPIO_TypeDef*)(STM_GPIO_BASE_ADDRESS+(Pin/16*0x400l)); if((gpio->LCKR&0x10000)!=0)return 1; unsigned long lr=gpio->LCKR; lr&=0xffff; for(;;) { gpio->LCKR=lr|0x10000; gpio->LCKR=lr; gpio->LCKR=lr|0x10000; lr=gpio->LCKR; if((gpio->LCKR&0x10000)!=0)continue; lr=gpio->LCKR; if((gpio->LCKR&0x10000)!=0)break; } #endif return 1; } //-- |
主题最新回顾(发布时间:2009-07-05 08:42:47) |
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-- 作者:McuIsp
-- stm32 IO操作函数MyPinOp: MyPinOp.h
#ifndef __MyPinOp_H //#define LockPortEn #define STM32PINA00 (0*16+0) #define STM32PINB00 (1*16+0) #define STM32PINC00 (2*16+0) #define STM32PIND00 (3*16+0) #define STM32PINE00 (4*16+0) #define STM32PINF00 (5*16+0) #define STM32PING00 (6*16+0) typedef enum void SetPinMode(unsigned char Pin,TStmPinMode mode); #include "CortexM3_Bitband_DEF.h"
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